From: email@example.com (Jouko Valta)
Subject: Re: I know there's a Z80 there somewhere!
Date: 24 Feb 1996 11:20:41 GMT
Peter T Karlsson <firstname.lastname@example.org> writes:
Peter> Isn't it so that the Z80B chip on the C128 runs in 4MHz, Peter> but still has the 2MHz data bus limitation of the C128?
Umm, partly yes, but the 4MHz signal is driven trough an 1MHz gate just like the 8502 fast clock. This results in 2 MHz effective clock signal.
I used both oscilloscope and frequency counter to verify this:
Z80 is clocked at average 1.97051MHz, (slow and fast, Z80 inactive) 8502 -"- average 0.98525MHz (slow) and 1.89050MHz (fast).
The Z80 clock signal looks like this:
.__. .__. .__. .__. | | | | | | | | _______| |__| |________| |__| |________
The C128 I/O chips, however, are limited to 1MHz only, but it's still unclear what the IOACC actually does.
Peter> I saw an article on this in an old Swedish computer Peter> magazine ("Oberoende COMputer", originally a translated Peter> danish magazine), which had code to switch back and forth Peter> the modes. They did a fill of the graphics screen with Peter> zeroes to clean it, and the Z80B version was a second Peter> faster, or something like that (don't know the exact Peter> figures), even though it had to go via the reset vector to Peter> invoke the Z80B, and then returning control to the 8502.
Sounds interesting. Could you find any more info ?
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